1. Field of the Invention
The present invention relates to a voltage generator and related method, and more particularly, to a voltage generator capable of preventing latch-up and related method.
2. Description of the Prior Art
Charge pump circuits are typically applied in driving circuits of electronic products, such as memory drivers, LCD backlight modules, and LED backlight drivers. The charge pump circuit accomplishes energy transfer and voltage conversion by using charges stored on capacitors to establish required positive or negative high output voltages, and also simultaneously provides different output voltages at various voltage levels.
Please refer to FIG. 1. FIG. 1 is a schematic diagram of a charge pump circuit 10 according to the prior art. As shown in FIG. 1, the charge pump circuit 10 includes a positive charge pump unit 102, a negative charge pump unit 104, a second stage charge pump unit 106, and a diode 108. The positive charge pump unit 102 is used for converting an input voltage VCI to a positive charge pump voltage AVDD, which is usually multiple times the input voltage VCI. The negative charge pump unit 104 is used for converting the input voltage VCI to a negative charge pump voltage VCL, which is a negative voltage and usually a negative multiple times the input voltage VCI. The second stage charge pump unit 106 is coupled to the positive charge pump unit 102 and the negative charge pump unit 104 for generating a gate-on voltage VGH (positive voltage) and a gate-off voltage VGL (negative voltage) sent to a system according to the positive charge pump voltage AVDD and the negative charge pump voltage VCL. The diode 108 is coupled to the second stage charge pump unit 106 for preventing latch-up during power up.
Please refer to FIG. 2. FIG. 2 is a schematic diagram of signal waveforms of each component of the charge pump circuit 10 shown in FIG. 1 under different power-on sequences. Suppose the charge pump circuit 10 generates the gate-on voltage VGH at six times the input voltage VCI (VGH=6VCI) and the gate-on voltage VGH at five times the negative input voltage VCI (VGL=−5VCI). In FIG. 2, the signal waveforms from top to bottom are the gate-on voltage VGH, the positive charge pump voltage AVDD, the negative charge pump voltage VCL, the gate-off voltage VGL, a second enable signal VCL_EN, a third enable signal VGH_EN, a fourth enable signal VGL_EN, and a first enable signal AVDD_EN. Suppose when the first enable signal AVDD_EN is switched to an enable state (i.e. high voltage level), the positive charge pump unit 102 begins to generate the positive charge pump voltage AVDD. When the third enable signal VGH_EN is switched to the enable state, the second stage charge pump unit 106 begins to generate the gate-on voltage VGH. When the fourth enable signal VGL_EN is switched to the enable state, the negative charge pump unit 104 begins to generate the gate-off voltage VGL. When the second enable signal VCL_EN is switched to an enable state, the negative charge pump unit 104 begins to generate the negative charge pump voltage VCL. As shown in FIG. 2, at a time t1, the positive charge pump unit 102 starts to set up the positive charge pump voltage AVDD, and at a time point t2, the second stage charge pump unit 106 begins to output the gate-on voltage VGH. Similarly, the gate-off voltage VGL and the negative charge pump voltage VCL are obtained in turn. In other words, the power on sequence is as follows: AVDD→VGH→VGL→VCL.
However, as the charge pump circuit 10 generates the gate-on voltage VGH or the gate-off voltage VGL, parasitic bipolar transistors conduct unexpectedly, leading to leakage current due to the gate-on voltage VGH or the gate-off voltage VGL being directly increased or decreased to a target voltage. In such a condition, at the beginning of generating the gate-on voltage VGH, the gate-off voltage VGL undergoes a sharply increasing transient voltage effect (a point P1 shown in FIG. 2). Similarly, at the beginning of generating the gate-off voltage VGL, the gate-on voltage VGH has a sharply decreasing transient voltage effect (a point P2 shown in FIG. 2). Also, in a high voltage and high temperature environment, latch-up may occur due to a leakage current effect, and may even destroy the charge pump circuit 10. Therefore, to solve the abovementioned problem, the conventional method usually uses the diode 108 for clamping the voltage level of the gate-off voltage VGL outputted from the second stage charge pump unit 106 to prevent the latch-up phenomenon. As a result, an extra diode element is required, thereby causing increased manufacturing cost.